The invention is directed to an arrangement for bit-parallel addition of binary numbers in two's complement with carry-save overflow correction.
An arrangement of this kind is known from the book Computer Arithmetic by K. Hwang, John Wiley and Sons, New York, 1979, pp. 98-103, FIG. 4.2. Every first adder has three inputs that receive equivalent bits of the three binary numbers to be added to one another. The sum outputs of the first adders are connected to first inputs of the adder device and the carry outputs of the first adders (with the exception of the most significant adder) are connected to second inputs of the adder device. A sum word appears at the outputs of the latter as result of the addition. In contrast to an adder arrangement having a carry-propagate, the carries of all the first adders are simultaneously formed and, as a carry word, are available for an addition in the adder device with the intermediate sum word formed by the first adders. An adder arrangement constructed in this way works on what is referred to as the "carry-save" principle.
Given a "carry-save" arrangement for the addition of binary numbers in two's complement, an overflow can occur, because of the separate representation of the sum supplied by the first adders in the form of an intermediate sum word and of a carry word, this overflow leading to an incorrect addition result. Such an error arises when relatively small sum words are formed from larger intermediate sum words and carry words having the opposite operational sign.